module FlipFlop(busIn, selectIn, clk, aTriStateOut, bTriStateOut);

	input [31:0]busIn;
	input [31:0]selectIn;
	input clk;
	output [31:0] aTriStateOut;
	output [31:0] bTriStateOut;
	
	
	//drive clk and selectIn[0] to grnd
	//code for circles
	
	//how to handle first bits?
	
	
endmodule